Hardware and Embedded Systems (HES) Group Computer Systems Lab (CSL), ELIS, Ghent University

Publications

Current research carried out by the main group members addresses EDA CAD for FPGA/ASIC as well as low-level device modelling.

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All

2026

Modeling and optimization of CFET structures for sub-3 nm CMOS scaling
Modeling and optimization of CFET structures for sub-3 nm CMOS scaling
Nour El I Boukortt, Dirk Stroobandt
Micro and Nanostructures  ·  01 Feb 2026  ·  doi:10.1016/j.micrna.2025.208506

2025

Length-Matching Routing for Programmable Photonic Circuits Using Best-First Strategy
Length-Matching Routing for Programmable Photonic Circuits Using Best-First Strategy
Xiaoke Wang, Dirk Stroobandt
2025 International Conference on Field Programmable Technology (ICFPT)  ·  02 Dec 2025  ·  doi:10.1109/icfpt67023.2025.00028
Dense or Sparse Post-Packing Interconnection Analysis in FPGAs
Dense or Sparse? Post-Packing Interconnection Analysis in FPGAs
Xiaoke Wang, Dirk Stroobandt
Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies  ·  25 May 2025  ·  doi:10.1145/3728179.3728182
Interconnection Optimization: A Treasure Trove for the EDA of Digital Electronic Circuits
Interconnection Optimization: A Treasure Trove for the EDA of Digital Electronic Circuits
Xiaoke Wang
Zenodo  ·  24 Mar 2025  ·  doi:10.5281/zenodo.15077103
A Novel Connection-Based Multicasting Router for Programmable Photonic Circuits
A Novel Connection-Based Multicasting Router for Programmable Photonic Circuits
Xiaoke Wang, Ferre Vanden Kerchove, Raveena Raikar, Mario Pickavet, Wim Bogaerts, Dirk Stroobandt
Journal of Lightwave Technology  ·  15 Mar 2025  ·  doi:10.1109/JLT.2024.3504279
Applied Reconfigurable Computing. Architectures, Tools, and Applications
Applied Reconfigurable Computing. Architectures, Tools, and Applications
Roberto Giorgi, Mirjana Stojilović, Dirk Stroobandt, Piedad Brox Jiménez, Ángel Barriga Barros
Lecture Notes in Computer Science  ·  01 Jan 2025  ·  doi:10.1007/978-3-031-87995-1

2024

Routing in 2.5D FPGAs: How long should interposer lines be
Routing in 2.5D FPGAs: How long should interposer lines be?
Raveena Raikar, Dirk Stroobandt
Proceedings of the 2024 ACM International Workshop on System-Level Interconnect Pathfinding  ·  31 Oct 2024  ·  doi:10.1145/3708358.3709349
The Influence of Interconnection Complexity on the FPGA CAD Flow
The Influence of Interconnection Complexity on the FPGA CAD Flow
Xiaoke Wang, Dirk Stroobandt
Proceedings of the 2024 ACM International Workshop on System-Level Interconnect Pathfinding  ·  31 Oct 2024  ·  doi:10.1145/3708358.3709350
LiquidMD: Optimizing Inter-die and Intra-die placement for 2.5D FPGA Architectures
LiquidMD: Optimizing Inter-die and Intra-die placement for 2.5D FPGA Architectures
Raveena Raikar, Dirk Stroobandt
14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 24))  ·  19 Jun 2024  ·  doi:10.1145/3665283.3665295
RAW 2024 Invited Talk-4: Reconfigurable Computing: Quo Vadis
RAW 2024 Invited Talk-4: Reconfigurable Computing: Quo Vadis?
Dirk Stroobandt
2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)  ·  27 May 2024  ·  doi:10.1109/IPDPSW63119.2024.00025
Balancing Intra-Die and Inter-Die Placement Optimization in 2.5D FPGA Architectures
Balancing Intra-Die and Inter-Die Placement Optimization in 2.5D FPGA Architectures
Raveena Raikar, Dirk Stroobandt
2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)  ·  27 May 2024  ·  doi:10.1109/IPDPSW63119.2024.00047
High-density standard cell libraries with backside power options in A14 nanosheet node
High-density standard cell libraries with backside power options in A14 nanosheet node
Halil Kukner, Gioele Mirabelli, Sheng Yang, Yun Zhou, Alexander Makarov, …, Anabela Veloso, Odysseas Zografos, Pieter Weckx, Julien Ryckaert, Geert Hellings
DTCO and Computational Patterning III  ·  10 Apr 2024  ·  doi:10.1117/12.3010866

2023

On the Interconnection Complexity vs Size Trade-off in Circuit Graphs
On the Interconnection Complexity vs Size Trade-off in Circuit Graphs
Marieke Louage, Muhammad Mazher Iqbal, Dirk Stroobandt
Proceedings of the 2023 ACM International Workshop on System-Level Interconnect Pathfinding  ·  02 Nov 2023  ·  doi:10.1145/3632409.3632838
Modularity Driven Parallel Placement Algorithm for 2.5D FPGA Architectures
Modularity Driven Parallel Placement Algorithm for 2.5D FPGA Architectures
Raveena Raikar, Dirk Stroobandt
Proceedings of the 2023 ACM International Workshop on System-Level Interconnect Pathfinding  ·  02 Nov 2023  ·  doi:10.1145/3632409.3632839
RapidStream 2.0: Automated Parallel Implementation of Latency Insensitive FPGA Designs Through Partial Reconfiguration
RapidStream 2.0: Automated Parallel Implementation of Latency–Insensitive FPGA Designs Through Partial Reconfiguration
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Eddie Hung, …, Linghao Song, Yuanlong Xiao, Alireza Kaviani, Zhiru Zhang, Jason Cong
ACM Transactions on Reconfigurable Technology and Systems  ·  01 Sep 2023  ·  doi:10.1145/3593025
Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node
Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node
G. Sisto, R. Preston, R. Chen, G. Mirabelli, A. Farokhnejad, …, M. Stucchi, O. Zografos, P. Weckx, G. Hellings, J. Ryckaert
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)  ·  11 Jun 2023  ·  doi:10.23919/vlsitechnologyandcir57934.2023.10185211

2022

Multi-Die Heterogeneous FPGAs
Multi-Die Heterogeneous FPGAs
Raveena Raikar, Dirk Stroobandt
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding  ·  03 Nov 2022  ·  doi:10.1145/3557988.3569711
Update Logic Synthesis Objectives for Better Placement and Routing
Update Logic Synthesis Objectives for Better Placement and Routing
Marieke Louage, Dirk Stroobandt
Zenodo  ·  28 Oct 2022  ·  doi:10.5281/zenodo.7405521
RapidStream
RapidStream
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong
Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays  ·  11 Feb 2022  ·  doi:10.1145/3490422.3502361
FPGA placement and routing : from academia to industry
FPGA placement and routing : from academia to industry
Yun Zhou
Ghent University  ·  01 Jan 2022  ·  handle:1854/LU-8771056

2021

RWRoute: An Open-source Timing-driven Router for Commercial FPGAs
RWRoute: An Open-source Timing-driven Router for Commercial FPGAs
Yun Zhou, Pongstorn Maidee, Chris Lavin, Alireza Kaviani, Dirk Stroobandt
ACM Transactions on Reconfigurable Technology and Systems  ·  29 Nov 2021  ·  doi:10.1145/3491236
RWRoute: An open-source timing-driven router for commercial FPGAs
RWRoute: An open-source timing-driven router for commercial FPGAs
Y Zhou, P Maidee, C Lavin, A Kaviani, D Stroobandt
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15 (1), 1-27, 2021  ·  01 Jan 2021  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:OU6Ihb5iCvQC

2020

Accelerating FPGA Routing Through Algorithmic Enhancements and Connection-aware Parallelization
Accelerating FPGA Routing Through Algorithmic Enhancements and Connection-aware Parallelization
Yun Zhou, Dries Vercruyce, Dirk Stroobandt
ACM Transactions on Reconfigurable Technology and Systems  ·  25 Aug 2020  ·  doi:10.1145/3406959
On the Exploration of Connection-aware Partitioning for Parallel FPGA Routing
On the Exploration of Connection-aware Partitioning for Parallel FPGA Routing
Yun Zhou, Dries Vercruyce, Dirk Stroobandt
Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays  ·  23 Feb 2020  ·  doi:https://doi.org/10.1145/3373087.3375351
In-circuit debugging with dynamic reconfiguration of FPGA interconnects
In-circuit debugging with dynamic reconfiguration of FPGA interconnects
A Kourfali, D Stroobandt
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 13 (1), 1-29, 2020  ·  01 Jan 2020  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:ZuybSZzF8UAC
Accelerating FPGA routing through algorithmic enhancements and connection-aware parallelization
Accelerating FPGA routing through algorithmic enhancements and connection-aware parallelization
Y Zhou, D Vercruyce, D Stroobandt
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 13 (4), 1-26, 2020  ·  01 Jan 2020  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:DJbcl8HfkQkC

2019

A New Adaptation of Particle Swarm Optimization Applied to Modern FPGA Placement
A New Adaptation of Particle Swarm Optimization Applied to Modern FPGA Placement
Yun Zhou, Dries Vercruyce, Dirk Stroobandt
2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)  ·  01 Jul 2019  ·  doi:10.1109/SMACD.2019.8795284
MODA-PSO
MODA-PSO
Yun Zhou, Dries Vercruyce, Dirk Stroobandt
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays  ·  20 Feb 2019  ·  doi:10.1145/3289602.3293959
CRoute: A fast high-quality timing-driven connection-based FPGA router
CRoute: A fast high-quality timing-driven connection-based FPGA router
D Vercruyce, E Vansteenkiste, D Stroobandt
2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019  ·  01 Jan 2019  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:738O_yMBCRsC

2017

Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications
Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications
A Kulkarni, D Stroobandt, A Werner, F Fricke, M Huebner
arXiv preprint arXiv:1705.01738, 2017  ·  01 Jan 2017  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:XUvXOeBm_78C
How preserving circuit design hierarchy during FPGA packing leads to better performance
How preserving circuit design hierarchy during FPGA packing leads to better performance
D Vercruyce, E Vansteenkiste, D Stroobandt
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017  ·  01 Jan 2017  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:Bg7qf7VwUHIC
Liquid: High quality scalable placement for large heterogeneous FPGAs
Liquid: High quality scalable placement for large heterogeneous FPGAs
D Vercruyce, E Vansteenkiste, D Stroobandt
2017 International Conference on Field Programmable Technology (ICFPT), 17-24, 2017  ·  01 Jan 2017  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:35r97b3x0nAC

2016

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures
EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures
D Stroobandt, AL Varbanescu, CB Ciobanu, M Al Kadi, A Brokalakis, …
2016 11th International Symposium on Reconfigurable Communication-centric …, 2016  ·  01 Jan 2016  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:k8Z6L05lTy4C
MiCAP-Pro: a high speed custom reconfiguration controller for Dynamic Circuit Specialization
MiCAP-Pro: a high speed custom reconfiguration controller for Dynamic Circuit Specialization
A Kulkarni, D Stroobandt
Design Automation for Embedded Systems 20 (4), 341-359, 2016  ·  01 Jan 2016  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:lSLTfruPkqcC
How to efficiently reconfigure tunable lookup tables for dynamic circuit specialization
How to efficiently reconfigure tunable lookup tables for dynamic circuit specialization
A Kulkarni, D Stroobandt
International Journal of Reconfigurable Computing 2016 (1), 5340318, 2016  ·  01 Jan 2016  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:BwyfMAYsbu0C
Efficient hardware debugging using parameterized FPGA reconfiguration
Efficient hardware debugging using parameterized FPGA reconfiguration
A Kourfali, D Stroobandt
2016 IEEE international parallel and distributed processing symposium …, 2016  ·  01 Jan 2016  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:WqliGbK-hY8C
A fully parameterized virtual coarse grained reconfigurable array for high performance computing applications
A fully parameterized virtual coarse grained reconfigurable array for high performance computing applications
A Kulkarni, E Vasteenkiste, D Stroobandt, A Brokalakis, A Nikitakis
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016  ·  01 Jan 2016  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:zA6iFVUQeVQC

2015

TCONMAP: Technology mapping for parameterised FPGA configurations
TCONMAP: Technology mapping for parameterised FPGA configurations
K Heyse, B Al Farisi, K Bruneel, D Stroobandt
ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (4 …, 2015  ·  01 Jan 2015  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:HbR8gkJAVGIC
FASTER: Facilitating analysis and synthesis technologies for effective reconfiguration
FASTER: Facilitating analysis and synthesis technologies for effective reconfiguration
D Pnevmatikatos, K Papadimitriou, T Becker, P Böhm, A Brokalakis, …
Microprocessors and Microsystems 39 (4-5), 321-338, 2015  ·  01 Jan 2015  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:_OXeSy2IsFwC
MiCAP: a custom reconfiguration controller for dynamic circuit specialization
MiCAP: a custom reconfiguration controller for dynamic circuit specialization
A Kulkarni, V Kizheppatt, D Stroobandt
2015 International Conference on ReConFigurable Computing and FPGAs …, 2015  ·  01 Jan 2015  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:5ugPr518TE4C
The Hamiltonian-based odd even turn model for maximally adaptive routing in 2D mesh networks-on-chip
The Hamiltonian-based odd–even turn model for maximally adaptive routing in 2D mesh networks-on-chip
P Bahrebar, D Stroobandt
Computers & Electrical Engineering 45, 386-401, 2015  ·  01 Jan 2015  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:3fE2CSJIrl8C

2014

Performance evaluation of dynamic circuit specialization on Xilinx FPGAs
Performance evaluation of dynamic circuit specialization on Xilinx FPGAs
A Kulkarni, K Heyse, T Davidson, D Stroobandt
Proceedings of the FPGA World Conference 2014, 1-6, 2014  ·  01 Jan 2014  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:dQ2og3OwTAUC
Improving hamiltonian-based routing methods for on-chip networks: a turn model approach
Improving hamiltonian-based routing methods for on-chip networks: a turn model approach
P Bahrebar, D Stroobandt
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014  ·  01 Jan 2014  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:tYavs44e6CUC
TPaR: place and route tools for the dynamic reconfiguration of the FPGA s interconnect network
TPaR: place and route tools for the dynamic reconfiguration of the FPGA's interconnect network
E Vansteenkiste, B Al Farisi, K Bruneel, D Stroobandt
IEEE Transactions on computer-aided design of integrated circuits and …, 2014  ·  01 Jan 2014  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:lvd772isFD0C

2013

The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks
The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks
P Bahrebar, D Stroobandt
2013 International Conference on Reconfigurable Computing and FPGAs …, 2013  ·  01 Jan 2013  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:BJbdYPG6LGMC
How to efficiently implement dynamic circuit specialization systems
How to efficiently implement dynamic circuit specialization systems
F Abouelella, T Davidson, W Meeus, K Bruneel, D Stroobandt
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (3 …, 2013  ·  01 Jan 2013  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:HtEfBTGE9r8C
A connection-based router for FPGAs
A connection-based router for FPGAs
E Vansteenkiste, K Bruneel, D Stroobandt
2013 International Conference on Field-Programmable Technology (FPT), 326-329, 2013  ·  01 Jan 2013  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:tS2w5q8j5-wC
Efficient implementation of virtual coarse grained reconfigurable arrays on FPGAs
Efficient implementation of virtual coarse grained reconfigurable arrays on FPGAs
K Heyse, T Davidson, E Vansteenkiste, K Bruneel, D Stroobandt
2013 23rd international conference on field programmable logic and …, 2013  ·  01 Jan 2013  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:tkaPQYYpVKoC
Training energy-based models for time-series imputation
Training energy-based models for time-series imputation
P Brakel, D Stroobandt, B Schrauwen
The Journal of Machine Learning Research 14 (1), 2771-2797, 2013  ·  01 Jan 2013  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:f2IySw72cVMC
Real-time detection of epileptic seizures in animal models using reservoir computing
Real-time detection of epileptic seizures in animal models using reservoir computing
P Buteneers, D Verstraeten, B Van Nieuwenhuyse, D Stroobandt, …
Epilepsy research 103 (2-3), 124-134, 2013  ·  01 Jan 2013  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:fFSKOagxvKUC

2012

Dynamic Circuit Specialisation for Key Based Encryption Algorithms and DNA Alignment
Dynamic Circuit Specialisation for Key‐Based Encryption Algorithms and DNA Alignment
T Davidson, F Abouelella, K Bruneel, D Stroobandt
International journal of reconfigurable computing 2012 (1), 716984, 2012  ·  01 Jan 2012  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:LI9QrySNdTsC
Mapping logic to reconfigurable FPGA routing
Mapping logic to reconfigurable FPGA routing
K Heyse, K Bruneel, D Stroobandt
22nd International Conference on Field Programmable Logic and Applications …, 2012  ·  01 Jan 2012  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:VL0QpB8kHFEC
An overview of today s high-level synthesis tools
An overview of today’s high-level synthesis tools
W Meeus, K Van Beeck, T Goedemé, J Meel, D Stroobandt
Design Automation for Embedded Systems 16 (3), 31-51, 2012  ·  01 Jan 2012  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:UebtZRa9Y70C

2011

Dynamic data folding with parameterizable FPGA configurations
Dynamic data folding with parameterizable FPGA configurations
K Bruneel, W Heirman, D Stroobandt
ACM Transactions on Design Automation of Electronic Systems (TODAES) 16 (4 …, 2011  ·  01 Jan 2011  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:HtS1dXgVpQUC
Automatic detection of epileptic seizures on the intra-cranial electroencephalogram of rats using reservoir computing
Automatic detection of epileptic seizures on the intra-cranial electroencephalogram of rats using reservoir computing
P Buteneers, D Verstraeten, P van Mierlo, T Wyckhuys, D Stroobandt, …
Artificial intelligence in medicine 53 (3), 215-223, 2011  ·  01 Jan 2011  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:eq2jaN3J8jMC

2010

Pincomm: Characterizing intra-application communication for the many-core era
Pincomm: Characterizing intra-application communication for the many-core era
W Heirman, D Stroobandt, NR Miniskar, R Wuyts, F Catthoor
2010 IEEE 16th International Conference on Parallel and Distributed Systems …, 2010  ·  01 Jan 2010  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:eJXPG6dFmWUC
TROUTE: a reconfigurability-aware FPGA router
TROUTE: a reconfigurability-aware FPGA router
K Bruneel, D Stroobandt
International Symposium on Applied Reconfigurable Computing, 207-218, 2010  ·  01 Jan 2010  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:Z5m8FVwuT1cC

2009

Teaching skills and concepts for embedded systems design
Teaching skills and concepts for embedded systems design
P Bertels, M D’Haene, T Degryse, D Stroobandt
ACM SIGBED Review 6 (1), 1-8, 2009  ·  01 Jan 2009  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:NyGDZy8z5eUC
Optimizing the FPGA memory design for a sobel edge detector
Optimizing the FPGA memory design for a sobel edge detector
CT Moore, H Devos, D Stroobandt
20th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC …, 2009  ·  01 Jan 2009  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:VLnqNzywnoUC
Accelerating event-driven simulation of spiking neurons with multiple synaptic time constants
Accelerating event-driven simulation of spiking neurons with multiple synaptic time constants
M D’Haene, B Schrauwen, J Van Campenhout, D Stroobandt
Neural computation 21 (4), 1068-1099, 2009  ·  01 Jan 2009  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:kuK5TVdYjLIC
Automatically mapping applications to a self-reconfiguring platform
Automatically mapping applications to a self-reconfiguring platform
K Bruneel, F Abouelella, D Stroobandt
2009 Design, Automation & Test in Europe Conference & Exhibition, 964-969, 2009  ·  01 Jan 2009  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:XiVPGOgt02cC
Pruning and regularization in reservoir computing
Pruning and regularization in reservoir computing
X Dutoit, B Schrauwen, J Van Campenhout, D Stroobandt, H Van Brussel, …
Neurocomputing 72 (7-9), 1534-1546, 2009  ·  01 Jan 2009  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:hqOjcs7Dif8C

2008

Predicting the performance of reconfigurable optical interconnects in distributed shared-memory systems
Predicting the performance of reconfigurable optical interconnects in distributed shared-memory systems
W Heirman, J Dambre, I Artundo, C Debaes, H Thienpont, D Stroobandt, …
Photonic Network Communications 15 (1), 25-40, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:mVmsd5A6BfQC
Reconfigurability-aware structural mapping for LUT-based FPGAs
Reconfigurability-aware structural mapping for LUT-based FPGAs
K Bruneel, D Stroobandt
2008 International Conference on Reconfigurable Computing and FPGAs, 223-228, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:O3NaXMp0MMsC
Using reservoir computing in a decomposition approach for time series prediction
Using reservoir computing in a decomposition approach for time series prediction
B Schrauwen, D Stroobandt
ESTSP 2008 European Symposium on Time Series Prediction, 149-158, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:-FonjvnnhkoC
Modeling multiple autonomous robot behaviors and behavior switching with a single reservoir computing network
Modeling multiple autonomous robot behaviors and behavior switching with a single reservoir computing network
E Antonelo, B Schrauwen, D Stroobandt
2008 IEEE International Conference on Systems, Man and Cybernetics, 1843-1848, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:WZBGuue-350C
Band-pass reservoir computing
Band-pass reservoir computing
F Wyffels, B Schrauwen, D Verstraeten, D Stroobandt
2008 IEEE International Joint Conference on Neural Networks (IEEE World …, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:mNrWkgRL2YcC
Mobile robot control in the road sign problem using reservoir computing networks
Mobile robot control in the road sign problem using reservoir computing networks
E Antonelo, B Schrauwen, D Stroobandt
2008 IEEE International Conference on Robotics and Automation, 911-916, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:1qzjygNMrQYC
Real-time epileptic seizure detection on intra-cranial rat data using reservoir computing
Real-time epileptic seizure detection on intra-cranial rat data using reservoir computing
P Buteneers, B Schrauwen, D Verstraeten, D Stroobandt
International Conference on Neural Information Processing, 56-63, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:2VqYfGB8ITEC
Automatic generation of run-time parameterizable configurations
Automatic generation of run-time parameterizable configurations
K Bruneel, D Stroobandt
2008 International Conference on Field Programmable Logic and Applications …, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:maZDTaKrznsC
Rent s rule and parallel programs: characterizing network traffic behavior
Rent's rule and parallel programs: characterizing network traffic behavior
W Heirman, J Dambre, D Stroobandt, J Van Campenhout
Proceedings of the 2008 international workshop on System level interconnect …, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:BrmTIyaxlBUC
Stable output feedback in reservoir computing using ridge regression
Stable output feedback in reservoir computing using ridge regression
F Wyffels, B Schrauwen, D Stroobandt
International conference on artificial neural networks, 808-817, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:0EnyYjriUFMC
Event detection and localization for small mobile robots using reservoir computing
Event detection and localization for small mobile robots using reservoir computing
EA Antonelo, B Schrauwen, D Stroobandt
Neural Networks 21 (6), 862-871, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:W7OEmFMy1HYC
Improving reservoirs using intrinsic plasticity
Improving reservoirs using intrinsic plasticity
B Schrauwen, M Wardermann, D Verstraeten, JJ Steil, D Stroobandt
Neurocomputing 71 (7-9), 1159-1171, 2008  ·  01 Jan 2008  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:Tyk-4Ss8FVUC

2007

Adapting reservoirs to get gaussian distributions
Adapting reservoirs to get gaussian distributions
D Verstraeten, B Schrauwen, D Stroobandt
Proceedings of the 15th European Symposium on Artificial Neural Networks …, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:prdVHNxh-e8C
A method for fast hardware specialization at run-time
A method for fast hardware specialization at run-time
K Bruneel, P Bertels, D Stroobandt
2007 International Conference on Field Programmable Logic and Applications …, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:QIV2ME_5wuYC
Scalable, wavelet-based video: From server to hardware-accelerated client
Scalable, wavelet-based video: From server to hardware-accelerated client
H Eeckhaut, H Devos, P Lambert, D De Schrijver, W Van Lancker, …
IEEE Transactions on Multimedia 9 (7), 1508-1519, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:t7zJ5fGR-2UC
Event detection and localization in mobile robot navigation using reservoir computing
Event detection and localization in mobile robot navigation using reservoir computing
EA Antonelo, B Schrauwen, X Dutoit, D Stroobandt, M Nuttin
International Conference on Artificial Neural Networks, 660-669, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:KlAtU1dfN6UC
Finding and applying loop transformations for generating optimized FPGA implementations
Finding and applying loop transformations for generating optimized FPGA implementations
H Devos, K Beyls, M Christiaens, J Van Campenhout, EH D’Hollander, …
Transactions on High-Performance Embedded Architectures and Compilers I, 159-178, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:ufrVoPGSRksC
Systematic simulation-based predictive synthesis of integrated optical interconnect
Systematic simulation-based predictive synthesis of integrated optical interconnect
I O’Connor, F Tissafi-Drissi, F Gaffiot, J Dambre, M De Wilde, …
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (8), 927-940, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:86PQX7AUzd4C
An experimental unification of reservoir computing methods
An experimental unification of reservoir computing methods
D Verstraeten, B Schrauwen, M d’Haene, D Stroobandt
Neural networks 20 (3), 391-403, 2007  ·  01 Jan 2007  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:u5HHmVD_uO8C

2006

Accelerating event based simulation for multi-synapse spiking neural networks
Accelerating event based simulation for multi-synapse spiking neural networks
M d’Haene, B Schrauwen, D Stroobandt
International Conference on Artificial Neural Networks, 760-769, 2006  ·  01 Jan 2006  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:4X0JR2_MtJMC
The unified reservoir computing concept and its digital hardware implementations
The unified reservoir computing concept and its digital hardware implementations
D Verstraeten, B Schrauwen, M D’Haene, D Stroobandt
Proceedings of the 2006 EPFL LATSIS Symposium, 139-140, 2006  ·  01 Jan 2006  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:gKiMpY-AVTkC
Integrated optical interconnect for on-chip data transport
Integrated optical interconnect for on-chip data transport
I O’Connor, F Tissafi-Drissi, D Navarro, F Mieyeville, F Gaffiot, J Dambre, …
4th International IEEE-NEWCAS Conference, 209-212, 2006  ·  01 Jan 2006  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:L7CI7m0gUJcC
Scalable hardware accelerator for comparing DNA and protein sequences
Scalable hardware accelerator for comparing DNA and protein sequences
P Faes, B Minnaert, M Christiaens, E Bonnet, Y Saeys, D Stroobandt, …
Proceedings of the 1st international conference on Scalable information …, 2006  ·  01 Jan 2006  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:ClCfbGk0d_YC
Optimizing the critical loop in the H. 264 AVC CABAC decoder
Optimizing the critical loop in the H. 264/AVC CABAC decoder
H Eeckhaut, M Christiaens, D Stroobandt, V Nollet
2006 IEEE International Conference on Field Programmable Technology, 113-118, 2006  ·  01 Jan 2006  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:uWiczbcajpAC
Reservoir-based techniques for speech recognition
Reservoir-based techniques for speech recognition
D Verstraeten, B Schrauwen, D Stroobandt
The 2006 IEEE International Joint Conference on Neural Network Proceedings …, 2006  ·  01 Jan 2006  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:YsMSGLbcyi4C

2005

Prediction model for evaluation of reconfigurable interconnects in distributed shared-memory systems
Prediction model for evaluation of reconfigurable interconnects in distributed shared-memory systems
W Heirman, J Dambre, C Debaes, H Thienpont, D Stroobandt, …
Proceedings of the 2005 international workshop on System level interconnect …, 2005  ·  01 Jan 2005  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:K3LRdlH-MEoC
A hardware-friendly wavelet entropy codec for scalable video
A hardware-friendly wavelet entropy codec for scalable video
H Eeckhaut, H Devos, B Schrauwen, M Christiaens, D Stroobandt
Design, Automation and Test in Europe, 14-19, 2005  ·  01 Jan 2005  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:OTTXONDVkokC
Towards reconfigurable optical networks on chip.
Towards reconfigurable optical networks on chip.
I O’Connor, M Briere, E Drouard, A Kazmierczak, F Tissafi-Drissi, …
ReCoSoC 5, 121-128, 2005  ·  01 Jan 2005  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:hC7cP41nSMkC
Reservoir computing with stochastic bitstream neurons
Reservoir computing with stochastic bitstream neurons
D Verstraeten, B Schrauwen, D Stroobandt
[no publisher info]  ·  01 Jan 2005  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:uWQEDVKXjbEC
Isolated word recognition with the liquid state machine: a case study
Isolated word recognition with the liquid state machine: a case study
D Verstraeten, B Schrauwen, D Stroobandt, J Van Campenhout
Information Processing Letters 95 (6), 521-528, 2005  ·  01 Jan 2005  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:d1gkVwhDpl0C

2004

Toward the accurate prediction of placement wire length distributions in VLSI circuits
Toward the accurate prediction of placement wire length distributions in VLSI circuits
J Dambre, D Stroobandt, J Van Campenhout
IEEE transactions on very large scale integration (VLSI) systems 12 (4), 339-348, 2004  ·  01 Jan 2004  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:4OULZ7Gr8RgC
Reconfigurable hardware for a scalable wavelet video decoder and its performance requirements
Reconfigurable hardware for a scalable wavelet video decoder and its performance requirements
D Stroobandt, H Eeckhaut, H Devos, M Christiaens, F Verdicchio, …
International Workshop on Embedded Computer Systems, 203-212, 2004  ·  01 Jan 2004  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:P5F9QuxV20EC

2003

Improved a priori interconnect predictions and technology extrapolation in the GTX system
Improved a priori interconnect predictions and technology extrapolation in the GTX system
Y Cao, C Hu, X Huang, AB Kahng, IL Markov, M Oliver, D Stroobandt, …
IEEE transactions on very large scale integration (VLSI) systems 11 (1), 3-14, 2003  ·  01 Jan 2003  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:geHnlv5EZngC
A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits
A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits
J Dambre, P Verplaetse, D Stroobandt, J Van Campenhout
IEEE transactions on very large scale integration (VLSI) systems 11 (1), 24-34, 2003  ·  01 Jan 2003  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:VaXvl8Fpj5cC
A priori wire length distribution models with multiterminal nets
A priori wire length distribution models with multiterminal nets
D Stroobandt
IEEE transactions on very large scale integration (VLSI) systems 11 (1), 35-43, 2003  ·  01 Jan 2003  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:5icHVeHT4IsC

2002

A stochastic model for the interconnection topology of digital circuits
A stochastic model for the interconnection topology of digital circuits
P Verplaetse, D Stroobandt, J Van Campenhout
IEEE transactions on very large scale integration (VLSI) systems 9 (6), 938-942, 2002  ·  01 Jan 2002  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:LhH-TYMQEocC
Synthetic benchmark circuits for timing-driven physical design applications
Synthetic benchmark circuits for timing-driven physical design applications
P Verplaetse, D Stroobandt, J Van Campenhout
Proceedings of the International Conference on VLSI 6, 31-37, 2002  ·  01 Jan 2002  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:cWzG1nlazyYC
Toward accurate models of achievable routing
Toward accurate models of achievable routing
AB Kahng, S Mantik, D Stroobandt
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002  ·  01 Jan 2002  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:foquWX3nUaYC
Generating synthetic benchmark circuits for evaluating CAD tools
Generating synthetic benchmark circuits for evaluating CAD tools
D Stroobandt, P Verplaetse, J Van Campenhout
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002  ·  01 Jan 2002  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:qjMakFHDy7sC

2001

Multi-terminal nets do change conventional wire length distribution models
Multi-terminal nets do change conventional wire length distribution models
D Stroobandt
International Workshop on System-Level Interconnect Prediction: Proceedings …, 2001  ·  01 Jan 2001  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:Tiz5es2fbqcC
Toward better wireload models in the presence of obstacles
Toward better wireload models in the presence of obstacles
CK Cheng, AB Kahng, B Liu, D Stroobandt
Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001  ·  01 Jan 2001  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:6yz0xqPARnAC
On Rent s rule for rectangular regions
On Rent's rule for rectangular regions
J Dambre, P Verplaetse, D Stroobandt, J Van Campenhout
Proceedings of the 2001 international workshop on System-level interconnect …, 2001  ·  01 Jan 2001  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:AXPGKjj_ei8C
A priori system-level interconnect prediction: Rent s rule and wire length distribution models
A priori system-level interconnect prediction: Rent's rule and wire length distribution models
D Stroobandt
Proceedings of the 2001 international workshop on System-level interconnect …, 2001  ·  01 Jan 2001  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:F1b5ZUV5XREC
On partitioning vs. placement Rent properties
On partitioning vs. placement Rent properties
P Verplaetse, J Dambre, D Stroobandt, J Van Campenhout
Proceedings of the 2001 international workshop on System-level interconnect …, 2001  ·  01 Jan 2001  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:dhFuZR0502QC
A priori wire length estimates for digital design
A priori wire length estimates for digital design
D Stroobandt
Springer Science & Business Media, 2001  ·  01 Jan 2001  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:9yKSN-GCB0IC

2000

Recent advances in system-level interconnect prediction
Recent advances in system-level interconnect prediction
D Stroobandt
IEEE Circuits and Systems Newsletter 19 (9), 4-20, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:4hFrxpcac9AC
Efficient representation of interconnection length distributions using generating polynomials
Efficient representation of interconnection length distributions using generating polynomials
D Stroobandt, H Van Marck
Proceedings of the 2000 international workshop on System-level interconnect …, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:yB1At4FlUx8C
Wiring layer assignments with consistent stage delays
Wiring layer assignments with consistent stage delays
AB Kahng, D Stroobandt
Proceedings of the 2000 international workshop on System-level interconnect …, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:9pM33mqn1YgC
Requirements for models of achievable routing
Requirements for models of achievable routing
AB Kahng, S Mantik, D Stroobandt
Proceedings of the 2000 international symposium on Physical design, 4-11, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:eQOLeE2rZwMC
On synthetic benchmark generation methods
On synthetic benchmark generation methods
P Verplaetse, J Van Campenhout, D Stroobandt
2000 IEEE International Symposium on Circuits and Systems (ISCAS) 4, 213-216, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:roLk4NBRz8UC
GTX: The MARCO GSRC technology extrapolation system
GTX: The MARCO GSRC technology extrapolation system
AE Caldwell, Y Cao, AB Kahng, F Koushanfar, H Lu, IL Markov, M Oliver, …
Proceedings of the 37th Annual Design Automation Conference, 693-698, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:IjCSPb-OGe4C
Effects of global interconnect optimizations on performance estimation of deep submicron design
Effects of global interconnect optimizations on performance estimation of deep submicron design
Y Cao, C Hu, X Huang, AB Kahng, S Muddu, D Stroobandt, D Sylvester
IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:UeHWp8X0CEIC
The interpretation and application of Rent s rule
The interpretation and application of Rent's rule
P Christie, D Stroobandt
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (6), 639-648, 2000  ·  01 Jan 2000  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:u-x6o8ySG0sC

1999

Towards synthetic benchmark circuits for evaluating timing-driven cad tools
Towards synthetic benchmark circuits for evaluating timing-driven cad tools
D Stroobandt, P Verplaetse, J Van Campenhout
Proceedings of the 1999 international symposium on Physical design, 60-66, 1999  ·  01 Jan 1999  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:CHSYGLWDkRkC
Generating new benchmark designs using a multi-terminal net model
Generating new benchmark designs using a multi-terminal net model
D Stroobandt, J Depreitere, J Van Campenhout
Integration 27 (2), 113-129, 1999  ·  01 Jan 1999  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:qxL8FJ1GzNcC
On an efficient method for estimating the interconnection complexity of designs and on the existence of region III in Rent s rule
On an efficient method for estimating the interconnection complexity of designs and on the existence of region III in Rent's rule
D Stroobandt
Proceedings Ninth Great Lakes Symposium on VLSI, 330-331, 1999  ·  01 Jan 1999  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:_FxGoFyzp5QC
Accurate interconnection length estimations for predictions early in the design cycle
Accurate interconnection length estimations for predictions early in the design cycle
D Stroobandt, JV Campenhout
VLSI Design 10 (1), 1-20, 1999  ·  01 Jan 1999  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:2osOgNQ5qMEC

1998

Analytical methods for a priori wire length estimates in computer systems
Analytical methods for a priori wire length estimates in computer systems
D Stroobandt
University of Ghent, 1998  ·  01 Jan 1998  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:Se3iqnhoufwC
On the characterization of multi-point nets in electronic designs
On the characterization of multi-point nets in electronic designs
D Stroobandt, FJ Kurdahi
Proceedings of the 8th Great Lakes Symposium on VLSI (Cat. No. 98TB100222 …, 1998  ·  01 Jan 1998  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:WF5omc3nYNoC

1997

Estimating interconnection lengths in three-dimensional computer systems
Estimating interconnection lengths in three-dimensional computer systems
D Stroobandt, J Van Campenhout
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS E SERIES D 80, 1024-1031, 1997  ·  01 Jan 1997  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:Y0pCki6q_DkC

1996

Improving Donath s technique for estimating the average interconnection length in computer logic
Improving Donath's technique for estimating the average interconnection length in computer logic
D Stroobandt
ELIS Tech. Rep. DG 96-01, 1996  ·  01 Jan 1996  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:rmuvC79q63oC

1995

Interconnection length distributions in 3-dimensional anisotropic systems
Interconnection length distributions in 3-dimensional anisotropic systems
H Van Marck, D Stroobandt, J Van Campenhout
APPLIED INFORMATICS-PROCEEDINGS-, 98-101, 1995  ·  01 Jan 1995  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:uc_IGeMz5qoC
Towards an extension of Rent s rule for describing local variations in interconnection complexity
Towards an extension of Rent’s rule for describing local variations in interconnection complexity
H Van Marck, D Stroobandt, J Van Campenhout
Proc. 4th Intl. Conf. for Young Computer Scientists, 136-141, 1995  ·  01 Jan 1995  ·  gs_3EDq0vMAAAAJ_3EDq0vMAAAAJ:zYLM7Y9cAGgC