Hardware and Embedded Systems (HES) Group Computer Systems Lab (CSL), ELIS, Ghent University

Research

Current research carried out by the main group members addresses EDA CAD for FPGA/ASIC as well as low-level device modelling.

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All

2026

Modeling and optimization of CFET structures for sub-3 nm CMOS scaling
Modeling and optimization of CFET structures for sub-3 nm CMOS scaling
Nour El I Boukortt, Dirk Stroobandt
Micro and Nanostructures  ·  01 Feb 2026  ·  doi:10.1016/j.micrna.2025.208506

2025

Dense or Sparse Post-Packing Interconnection Analysis in FPGAs
Dense or Sparse? Post-Packing Interconnection Analysis in FPGAs
Xiaoke Wang, Dirk Stroobandt
Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies  ·  25 May 2025  ·  doi:10.1145/3728179.3728182
Interconnection Optimization: A Treasure Trove for the EDA of Digital Electronic Circuits
Interconnection Optimization: A Treasure Trove for the EDA of Digital Electronic Circuits
Xiaoke Wang
Zenodo  ·  24 Mar 2025  ·  doi:10.5281/zenodo.15077103
A Novel Connection-Based Multicasting Router for Programmable Photonic Circuits
A Novel Connection-Based Multicasting Router for Programmable Photonic Circuits
Xiaoke Wang, Ferre Vanden Kerchove, Raveena Raikar, Mario Pickavet, Wim Bogaerts, Dirk Stroobandt
Journal of Lightwave Technology  ·  15 Mar 2025  ·  doi:10.1109/JLT.2024.3504279
Applied Reconfigurable Computing. Architectures, Tools, and Applications
Applied Reconfigurable Computing. Architectures, Tools, and Applications
Roberto Giorgi, Mirjana Stojilović, Dirk Stroobandt, Piedad Brox Jiménez, Ángel Barriga Barros
Lecture Notes in Computer Science  ·  01 Jan 2025  ·  doi:10.1007/978-3-031-87995-1

2024

Routing in 2.5D FPGAs: How long should interposer lines be
Routing in 2.5D FPGAs: How long should interposer lines be?
Raveena Raikar, Dirk Stroobandt
Proceedings of the 2024 ACM International Workshop on System-Level Interconnect Pathfinding  ·  31 Oct 2024  ·  doi:10.1145/3708358.3709349
The Influence of Interconnection Complexity on the FPGA CAD Flow
The Influence of Interconnection Complexity on the FPGA CAD Flow
Xiaoke Wang, Dirk Stroobandt
Proceedings of the 2024 ACM International Workshop on System-Level Interconnect Pathfinding  ·  31 Oct 2024  ·  doi:10.1145/3708358.3709350
LiquidMD: Optimizing Inter-die and Intra-die placement for 2.5D FPGA Architectures
LiquidMD: Optimizing Inter-die and Intra-die placement for 2.5D FPGA Architectures
Raveena Raikar, Dirk Stroobandt
14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 24))  ·  19 Jun 2024  ·  doi:10.1145/3665283.3665295
RAW 2024 Invited Talk-4: Reconfigurable Computing: Quo Vadis
RAW 2024 Invited Talk-4: Reconfigurable Computing: Quo Vadis?
Dirk Stroobandt
2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)  ·  27 May 2024  ·  doi:10.1109/IPDPSW63119.2024.00025
Balancing Intra-Die and Inter-Die Placement Optimization in 2.5D FPGA Architectures
Balancing Intra-Die and Inter-Die Placement Optimization in 2.5D FPGA Architectures
Raveena Raikar, Dirk Stroobandt
2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)  ·  27 May 2024  ·  doi:10.1109/IPDPSW63119.2024.00047

2023

On the Interconnection Complexity vs Size Trade-off in Circuit Graphs
On the Interconnection Complexity vs Size Trade-off in Circuit Graphs
Marieke Louage, Muhammad Mazher Iqbal, Dirk Stroobandt
Proceedings of the 2023 ACM International Workshop on System-Level Interconnect Pathfinding  ·  02 Nov 2023  ·  doi:10.1145/3632409.3632838
Modularity Driven Parallel Placement Algorithm for 2.5D FPGA Architectures
Modularity Driven Parallel Placement Algorithm for 2.5D FPGA Architectures
Raveena Raikar, Dirk Stroobandt
Proceedings of the 2023 ACM International Workshop on System-Level Interconnect Pathfinding  ·  02 Nov 2023  ·  doi:10.1145/3632409.3632839

2022

Multi-Die Heterogeneous FPGAs
Multi-Die Heterogeneous FPGAs
Raveena Raikar, Dirk Stroobandt
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding  ·  03 Nov 2022  ·  doi:10.1145/3557988.3569711
Update Logic Synthesis Objectives for Better Placement and Routing
Update Logic Synthesis Objectives for Better Placement and Routing
Marieke Louage, Dirk Stroobandt
Zenodo  ·  28 Oct 2022  ·  doi:10.5281/zenodo.7405521

2021

RWRoute: An Open-source Timing-driven Router for Commercial FPGAs
RWRoute: An Open-source Timing-driven Router for Commercial FPGAs
Yun Zhou, Pongstorn Maidee, Chris Lavin, Alireza Kaviani, Dirk Stroobandt
ACM Transactions on Reconfigurable Technology and Systems  ·  29 Nov 2021  ·  doi:10.1145/3491236