Dirk StroobandtProfessor, Group leader
He is leading the HES team with research interests in run-time reconfiguration, communication and high-level synthesis.
Alexandra KourfaliPhD researcher
Improving ASIC Verification using Parameterised FPGA Configurations
Amit KulkarniPhD researcher
Run-time reconfiguration in FPGAs
Dries VercruycePhD researcher
His research is focused on a new tool for the automatic generation of the interconnection network for new FPGA architectures.
Elias VansteenkistePhD researcher
Making FPGA CAD tools more scalable, mainly the backend of the tool flow, pack, place and route. Research on new architectural features for programmable devices and developing a new tool flow for the dynamic reconfiguration of FPGAs, that will allow fine-grain run-time reconfiguration of the interconnect network and the lookup tables.
Karel HeysePhD researcher
Poona BahrebarPhD researcher
Design and exploration of routing methods for NoC-based multicore systems
Yun ZhouPhD researcher
Exploration and Design of Placement Methods for FPGA CAD Tools
Brahim Al FarisiFormer Member
Research is focused on using the technique of parametrizable configurations for a modular type of run-time reconfiguration
Fatma AbouelellaFormer Member, Post-doc
Her research will be on efficently generating an FPGA configuration at run-time
Karel BruneelFormer Member, Post-doc
Tom DavidsonFormer Member, Post-doc
His research will be focused on dynamic reconfiguration of FPGA's, more specifically on allowing dynamic reconfiguration from higher design levels, such as the Algorithmic level.