FPL 2010
Full title
International Conference on Field Programmable Logic and Applications
Conference date
31 August - 2 September 2010
Important dates
- submission date: 22 March 2010
- notification date: 28 May 2010
- final version: 15 June 2010
Location
Website
The International Conference on Field Programmable Logic and Applications (FPL) is the first and largest conference covering the rapidly growing area of field- programmable logic. During the past 19 years, many of the advances achieved in reconfigurable architectures, applications, design methods and tools have been first published in the proceedings of the FPL conference series.
Its objective is to bring together researchers and industry from all over the world for a wide ranging discussion of FPGAs, including, but not limited to: applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, dynamic reconfiguration.
FPL is organized yearly in Europe and attended by top-level scientists and researchers. The 20th FPL continues the tradition of the previous editions and will be hosted by the Dipartimento di Elettronica ed Informazione (DEI) of the Politecnico di Milano, Italy, from August 31 to September 2, 2010.
The Program Committee cordially invites you to participate and submit your contribution to FPL 2010. The conference topics include, but are not limited to:
Reconfigurable Architectures
- Dynamic, partial, run-time reconfiguration
- Low power architectures
- Defect and fault tolerance
- Reconfigurable embedded systems
- Field-programmable analog arrays
- Interconnects and NoCs
Applications
- Communications and networking
- Cryptography
- Bioinformatics
- Application acceleration
- Evolvable and bio-inspired applications
- Medical solutions
- Experiments for High Energy Physics
- Astronomy
- Aerospace
Design Methods and Tools
- CAD for reconfigurable architectures
- Dynamic, partial, run-time reconfiguration
- Logic optimization and technology mapping
- Placement and routing algorithms
- System-level design methods
- Testing, verification, and benchmarking
- Hardware/software co-design
- Compilers and languages
- Rapid prototyping
- Radiation tolerance and reliability
Self-aware and adaptive systems
- Self-aware Operating Systems
- Partial and dynamic reconfiguration for:
- self-configuration
- self-testing
- self-healing
- Adaptive algorithm and distributed self-training algorithms
- Adaptive communication infrastructure
- Biologically inspired systems
Surveys, Trends and Education
- Roadmap for reconfigurable computing
- Teaching reconfigurable systems
- History and surveys of reconfigurable logic
- Emerging device technologies
- Tutorials
Authors are invited to submit original and unpublished contributions as either 6 page papers to be considered as regular papers (submissions accepted as posters will have 4 pages) or 2 page extended abstracts for PhD forum contributions. The page limit includes tables, figures, and references. All contributions must be submitted electronically in PDF format via the web page linked at http://www.fpl.org
The 2010 International Conference on Field Programmable Logic and Applications is technically co-sponsored by the IEEE Circuits and Systems Society. The conference proceedings will be published by the IEEE and will appear in the IEEE Xplore electronic library.
Each accepted paper MUST have at least an author with a paid registration for the manuscript to be included and published in the proceedings; an author is also expected to attend and present the paper at the conference.
FPL's PhD forum is intended as a venue for PhD students to present their work and receive feedback from other researchers. Papers accepted to the PhD forum will be published in the conference proceedings and presented at a special poster session during the conference. Contributions to the PhD forum based on preliminary results of work in progress are particularly encouraged.
Proposals for tutorials within the technical scope of the conference are solicited. Submissions should be done through email directly to the Program Chairs (marco.santambrogio@polimi.it, jari.nurmi@tut.fi)
General Chair Fabrizio Ferrandi, Politecnico di Milano
Program co-Chair Jari Nurmi, Tampere University of Technology Marco D. Santambrogio, Politecnico di Milano
Finance Chair Cristiana Bolchini, Politecnico di Milano
Publicity Co-Chair Seda Ogrenci Memik, Northwestern University Christos-Savvas Bouganis, Imperial College Philip Leong, The University of Sydney
Sponsor and Exhibition Co-Chair David Atienza, EPFL Francesco Bruschi, Politecnico di Milano
PhD forum Chair Giovanni Squillero, Politecnico di Torino
Local arrangements Chair Vincenzo Rana, Politecnico di Milano
Steering Committee: Jurgen Becker, University of Karlsruhe, Germany Koen Bertels, Technical University of Delft, Netherlands Eduardo Boemo, Universidad Autonoma de Madrid, Spain Peter Y.K. Cheung, Imperial College London, UK Jose T. de Sousa, Technical University of Lisbon, Portugal Manfred Glesner, Darmstadt University of Technology, Germany John Gray, Independent Consultant, UK Reiner Hartenstein, University of Kaiserslautern, Germany Andres Keevallik, Tallinn Technical University, Estonia Wayne Luk, Imperial College London, UK Patrick Lysaght, Xilinx, Inc., USA Jari Nurmi, Tampere University of Technology, Finland Lionel Torres, University of Montpellier II, France Serge Vernalde, IMEC, Belgium Roger Woods, Queen's University of Belfast, UK
