Karel Heyse

Karel Heyse

PhD researcher

karel.heyse [AT] UGent.be
+32 9 264 95 27 (phone)

Computing Systems Lab (CSL)
Electronics and Information Systems (ELIS) department
Ghent University
Sint Pietersnieuwstraat 41
9000 Ghent
Belgium


 

Research Project


My research is about exploiting the reconfigurability of Field Programmable Gate Arrays (FPGA). One application of this is Dynamic Circuit Specialisation using run-time reconfiguration. Using this technique the configuration of the FPGA is changed on the fly to better suit the problem at hand.

My research specifically focusses on exploiting the reconfigurability of the routing infrastructure of the FPGA.
Currently, work is being done on a new technology mapping step (part of the FPGA tool flow) which will enable to use the reconfigurability of the routing infrastructure of the FPGA to allow for better Dynamic Circuit Specialisation.




Courses (Assistant)



Publications to Appear



Publications


Journal papers

  1. Karel Heyse, Brahim Al Farisi, Karel Bruneel and Dirk Stroobandt TCONMAP: Technology Mapping for Parameterised FPGA Configurations ACM Transactions on Design Automation of Electronic Systems, Vol. 20(4), pp. 48:1-48:27 (2015)
  2. Karel Heyse, Jente Basteleus, Brahim Al Farisi, Dirk Stroobandt, Oliver Kadlcek and Oliver Pell On the impact of replacing low-speed configuration buses on FPGAs with the chip’s internal configuration infrastructure ACM Transactions on Reconfigurable Technology and Systems, Vol. 9(1), pp. 6:1-6:18 (2015)
  3. Tom Davidson, Elias Vansteenkiste, Karel Heyse, Karel Bruneel and Dirk Stroobandt Identification of dynamic circuit specialization opportunities in RTL code ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, Vol. 8(1), pp. 24 (2015)
  4. Brahim Al Farisi, Karel Heyse, Karel Bruneel, João Cardoso and Dirk Stroobandt Enabling FPGA routing configuration sharing in dynamic partial reconfiguration DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, Vol. 19(1-2), pp. 189-221 (2015)
  5. D Pnevmatikatos, K Papadimitriou, T Becker, P Böhm, A Brokalakis, Karel Bruneel, C Ciobanu, Tom Davidson, G Gaydadjiev, Karel Heyse, W Luk, X Niu, I Papaefstathiou, D Pau, O Pell, C Pilato, MD Santambrogio, D Sciuto, Dirk Stroobandt, T Todman and Elias Vansteenkiste FASTER : facilitating analysis and synthesis technologies for effective reconfiguration MICROPROCESSORS AND MICROSYSTEMS, Vol. 39(4-5), pp. 321-338 (2014)
  6. Karel Heyse, Karel Bruneel and Dirk Stroobandt Proving correctness of regular expression matchers with constrained repetition ELECTRONICS LETTERS, Vol. 49(1), pp. 41-42 (2013)

Conference publications

  1. Karel Heyse and Dirk Stroobandt Avoiding transitional effects in dynamic circuit specialisation on FPGAs Proceedings of the 52nd Annual Design Automation Conference, pp. 6 (2015)
  2. Amit Kulkarni, Tom Davidson, Karel Heyse and Dirk Stroobandt Improving reconfiguration speed for dynamic circuit specialization using placement constraints International Conference on ReConFigurable Computing and FPGAs, Proceedings, pp. 1-6 (2014)
  3. Karel Heyse, Dirk Stroobandt, Oliver Kadlcek and Oliver Pell On the impact of replacing a low-speed memory bus on the Maxeler platform, using the FPGA's configuration infrastructure LECTURE NOTES IN COMPUTER SCIENCE, Vol. 8405, pp. 85-96 (2014)
  4. Amit Kulkarni, Karel Heyse, Tom Davidson and Dirk Stroobandt Performance evaluation of dynamic circuit specialization on Xilinx FPGAs FPGAworld Conference 2014, Proceedings, pp. 6 (2014)
  5. Karel Heyse, Tom Davidson, Elias Vansteenkiste, Karel Bruneel and Dirk Stroobandt Efficient implementation of virtual coarse grained reconfigurable arrays on FPGAS Proceedings of the 23rd International Conference on Field Programmable Logic and Applications, pp. 1-8 (2013)
  6. Karel Heyse, Brahim Al Farisi, Karel Bruneel and Dirk Stroobandt Automating reconfiguration chain generation for SRL-based run-time reconfiguration LECTURE NOTES IN COMPUTER SCIENCE, Vol. 7199, pp. 1-12 (2012)
  7. Karel Heyse, Karel Bruneel and Dirk Stroobandt Mapping logic to reconfigurable FPGA routing 22nd International Conference on Field Programmable Logic and Applications, Proceedings, pp. 315-321 (2012)
  8. Brahim Al Farisi, Karel Heyse, Karel Bruneel and Dirk Stroobandt Memory-efficient and fast run-time reconfiguration of regularly structured designs Field Programmable Logic and Applications, 21st International conference, Proceedings, pp. 6 (2011)

Other publications

  1. Karel Heyse Automatiseren van SRL-herconfiguratie Afstudeerwerk FEA, UGent, pp. (2011)