Karel Bruneel

Karel Bruneel

Post-doc

karel.bruneel [AT] UGent.be
+32 9 264 89 65 (phone)
+32 9 264 35 94 (fax)

Computing Systems Lab (CSL)
Electronics and Information Systems (ELIS) department
Ghent University
Sint Pietersnieuwstraat 41
9000 Ghent
Belgium
 

Research Project







    Publications to Appear



    Publications


    Journal papers

    1. Tom Davidson, Fatma Mostafa Mohamed Ahmed Abouelella, Karel Bruneel and Dirk Stroobandt Dynamic circuit specialisation for key-based encryption algorithms and DNA alignment INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING, Vol. 2012, pp. 13 (2012)
    2. Karel Bruneel, Wim Heirman and Dirk Stroobandt Dynamic data folding with parameterizable FPGA configurations ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, Vol. 16(4), pp. 29 (2011)
    3. Dirk Stroobandt and Karel Bruneel Supersnelle runtime herconfiguratie eindelijk binnen handbereik Bits & Chips, Vol. 10(10), pp. 30-31 (2008)

    Conference publications

    1. Karel Heyse, Brahim Al Farisi, Karel Bruneel and Dirk Stroobandt Automating reconfiguration chain generation for SRL-based run-time reconfiguration LECTURE NOTES IN COMPUTER SCIENCE, Vol. 7199, pp. 1-12 (2012)
    2. Francis wyffels, Karel Bruneel, Pieter-Jan Kindermans, Michiel D'Haene, Pierre Woestyn, Peter Bertels and Benjamin Schrauwen Robot competitions trick students into learning Proceedings of the 2nd international conference on robotics in education, pp. 47-51 (2011)
    3. Dirk Stroobandt and Karel Bruneel How parameterizable run-time FPGA reconfiguration can benefit adaptive embedded systems Worldcomp 2011, Proceedings, pp. 184-194 (2011)
    4. Brahim Al Farisi, Karel Heyse, Karel Bruneel and Dirk Stroobandt Memory-efficient and fast run-time reconfiguration of regularly structured designs Field Programmable Logic and Applications, 21st International conference, Proceedings, pp. 6 (2011)
    5. Robbe Vancayseele, Brahim Al Farisi, Wim Heirman, Karel Bruneel and Dirk Stroobandt RecoNoC : a reconfigurable network-on-chip Reconfigurable Communication-centric Systems-on-Chip, 6th International workshop, Proceedings, pp. 2 (2011)
    6. Peter Bertels, Francis wyffels and Karel Bruneel Bouw een intelligente robot in de klas met Dwengo NIOC2011 : grenzeloos ICT onderwijs, pp. 18-23 (2011)
    7. Fatma Mostafa Mohamed Ahmed Abouelella, Karel Bruneel and Dirk Stroobandt Efficiently generating FPGA configurations through a stack machine Field Programmable Logic and Applications, 20th International conference, Abstracts, pp. (2010)
    8. Tom Davidson, Karel Bruneel and Dirk Stroobandt Run-time reconfiguration for automatic hardware/software partitioning Proceedings 2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010), pp. 424-429 (2010)
    9. Fatma Mostafa Mohamed Ahmed Abouelella, Karel Bruneel and Dirk Stroobandt Towards a more efficient run-time FPGA configuration generation ParCo 2009, Proceedings, pp. 8 (2010)
    10. Karel Bruneel and Dirk Stroobandt TROUTE : a reconfigurability-aware FPGA router LECTURE NOTES IN COMPUTER SCIENCE, Vol. 5992, pp. 207-218 (2010)
    11. Tom Davidson, Karel Bruneel, Harald Devos and Dirk Stroobandt Applying parameterizable dynamic configurations to sequence alignment ParCo 2009, Proceedings, pp. 8 (2010)
    12. Brahim Al Farisi, Karel Bruneel and Dirk Stroobandt Automatic tool flow for shift-register-LUT reconfiguration : making run-time reconfiguration fast and easy Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, pp. 287-287 (2010)
    13. Karel Bruneel, Fatma Mostafa Mohamed Ahmed Abouelella and Dirk Stroobandt Automatically Mapping Applications to a Self-reconfiguring Platform Proceedings of Design, Automation and Test in Europe, pp. 964-969 (2009)
    14. Karel Bruneel, Fatma Mostafa Mohamed Ahmed Abouelella and Dirk Stroobandt TMAP: A Reconfigurability-Aware Technology Mapper Design, Automation and Test Europe: University Booth, pp. (2009)
    15. Tom Degryse, Karel Bruneel, Harald Devos and Dirk Stroobandt Loop Transformations to Reduce the Dynamic FPGA Reconfiguration Overhead Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs, pp. 133-138 (2008)
    16. Karel Bruneel and Dirk Stroobandt Reconfigurability-Aware Structural Mapping for LUT-based FPGAs Proceedings of the 2008 International Conference on Reconfigurable Computing and FPGAs, pp. 223-228 (2008)
    17. Karel Bruneel and Dirk Stroobandt Automatic Generation of Run-time Parameterizable Configurations Proceedings of the International Conference on Field Programmable Logic and Applications, pp. 361-366 (2008)
    18. Tom Degryse, Karel Bruneel, Harald Devos and Dirk Stroobandt Reducing the dynamic FPGA reconfiguration overhead Architecture and Compilers for Embedded Systems, pp. 53-56 (2008)
    19. Tom Degryse, Karel Bruneel, Harald Devos and Dirk Stroobandt Reducing the dynamic FPGA reconfiguration overhead with loop transformations Fourth International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems, pp. 219-222 (2008)
    20. Karel Bruneel, Peter Bertels and Dirk Stroobandt A Method for Fast Hardware Specialization at Run-time Proceedings of the 2007 International Conference on Field Programmable Logic and Applications, pp. 35-40 (2007)
    21. Karel Bruneel FPGA Architectures for Fast Circuit Compilation Seventh FirW PhD Symposium, pp. (2006)

    Other publications

    1. Karel Bruneel Efficiente circuitspecialisatie voor dynamische herconfiguratie van FPGA's pp. (2011)
    2. K. Bruneel and B. Quaegebeur Herconfigureerbare generator van rasterbeelden Afstudeerwerk FTW, UGent, pp. (2005)